Sdrsharp software for mac os x 2017 for free#
The library, which we are referring to as “SDR IP cores” library, is available for free under the General Public License (GPL) on. The SDR IP core library comprises Digital Signal Processing (DSP) cores and input/output (I/O) interface cores. It exploits the parameters of SDR cores in order to integrate these existing library cores in the compilation flow hence enabling rapid prototyping of FPGA-based SDR at high-level of design abstraction. In our effort to improve SDR productivity and reduce design complexity, we also propose a tool-flow that uses a Domain-Specific Language (DSL) as its entry-point to describe algorithms and automate the generation of HDL code. The Reconfigurable Hardware Interface for computatioN and radiO (RHINO) platform is used as a case study for testing the library. The aim of our investigation is to establish an effective selection of IP cores for baseline SDR applications, which can improve developer productivity using cores that can be further built upon to realize more specialized application needs. We test the system using a legacy FPGA-based platform and recent add-on COTS daughterboard as a case study around which we build and test this library. In this paper we consider a standard VHSIC Hardware Description Language (VHDL) approach to SDR prototyping, for which we develop a reusable library of Intellectual Property (IP) cores for use in Software-Defined Radio (SDR) application prototyping. Similarly, familiarity with the tools can impact the quality and reusability of the designs. Development tool-chains and programming languages are highly influential in terms of developer productivity. Important selection decisions during development are influenced by the developers’ familiarity with processor and platform architectures, coding languages, design approaches, support for legacy systems, and familiar design tools, among other factors. The choice of SDR platform and components used to develop a complex SDR system is typically based on a variety of many interrelated selection decisions. A broad variety of SDR prototyping platforms is available, such as the USRP and Microsoft Sora, and rapid prototyping tools such as National Instruments LabView and GnuRadio. For example, a reconfigurable computer coupled to a commercial off-the-shelf (COTS) Radio Frequency (RF) daughterboard can reduce development time and lower costs in comparison to a custom-built PCB approach. In particular, time and cost savings can be achieved by reusing tested design artefacts. Software-Defined Radio (SDR) approaches for rapid prototyping of radio systems using reconfigurable hardware platforms offer significant advantages over traditional analog and hardware-centered methods. We conclude with a summary of the main characteristics of our SDR library and reflect on how our DSL tool-flow could assist other developers working in SDR field. We intend to take this DSL and supporting framework further to provide a rapid prototyping system for SDR application development to programmers not experienced in HDL coding.
Finally, we propose our design for a Domain-Specific Language (DSL) and supporting tool-flow, which we are in the process of building using our SDR library and the Delite DSL framework. The operation of the SDR cores is first validated and then benchmarked against two other cores libraries of a similar type to show that our cores do not take much more logic elements than existing cores and that they support a comparable maximum clock speed. The library comprises a set of cores that were chosen, together with their parameters and interfacing schemas, based on recommendations from industry and academic SDR experts. This paper reports on the design and implementation of an open-source library of parameterizable and reusable Hardware Description Language (HDL) Intellectual Property (IP) cores designed for the development of Software-Defined Radio (SDR) applications that are deployed on FPGA-based reconfigurable computing platforms.
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